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 AM79M535
Metering Subscriber Line Interface Circuit
DISTINCTIVE CHARACTERISTICS
s Programmable constant-current feed s Line-feed characteristics independent of battery variations s Programmable loop-detect threshold s On-chip switching regulator for low-power dissipation s Pin for external ground-key noise filter capacitor available s Ground-key detect s Two-wire impedance set by single external impedance s Performs polarity reversal s Tip Open state for ground-start lines s Supports 2.2 Vrms metering (12 and 16 kHz) s On-hook transmission
BLOCK DIAGRAM
Ring Relay Driver A(TIP) C1 C2 C3 HPA Two-Wire Interface HPB Signal Transmission Off-Hook Detector RD B(RING) DA DB VREG L VBAT BGND CHS QBAT CHCLK VCC VEE AGND
16856B-001
RINGOUT
Ground-Key Detector Input Decoder and Control
E1 E0 DET
GKFIL VTX RSN
Power-Feed Controller Ring-Trip Detector
RDC
Switching Regulator
Notes: 1. AM79M535--E0 and E1 inputs; ring relay driver sourced internally to BGND; ground-key filter pin. 2. Current gain (K1) = 1000.
Publication# 16856 Rev: E Issue Date: October 1999 Amendment: /0
ORDERING INFORMATION Standard Products
AMD standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed by a combination of the elements below.
AM79M535
J
C TEMPERATURE RANGE C = Commercial (0C to 70C)*
PACKAGE TYPE J = 32-Pin Plastic Leaded Chip Carrier (PL 032)
PERFORMANCE GRADE Blank = Standard Specification -1 = Performance Grading -2 = Performance Grading
DEVICE NAME/DESCRIPTION AM79M535 Subscriber Line Interface Circuit
Valid Combinations Valid Combinations AM79M535 -1 -2 JC Valid Combinations list configurations planned to be supported in volume for this device. Consult the local AMD sales office to confirm availability of specific valid combinations, to check on newly released combinations, and to obtain additional data on AMD's standard military grade products.
Note: * Functionality of the device from 0C to +70C is guaranteed by production testing. Performance from -40C to +85C is guaranteed by characterizations and periodic sampling of production units.
2
AM79M535 Data Sheet
CONNECTION DIAGRAM Top View
RINGOUT B(RING)
VREG
BGND
A(TIP)
VCC
4 TP GKFIL L VBAT QBAT CHS CHCLK RSVD E1 5 6 7 8 9 10 11 12 13
3
2
1
32 31 30 29 28 27 26 25 24 23 22 TP DA RD HPB HPA VTX VEE RSN AGND
DB 21 DGND
14 15 DET E0
16 17 18 C2 C3 C1
19 20 RDC
Notes: 1. Pin 1 is marked for orientation. 2. TP is a thermal conduction pin tied to substrate (QBAT). 3. RSVD = Reserved. Do not connect to this pin.
SLIC Products
3
PIN DESCRIPTIONS
Pin Names AGND DGND A(TIP) BGND B(RING) C3-C1 CHCLK CHS DA DB DET Gnd Gnd Output Gnd Output Input Input Input Input Input Output Type Analog (quiet) ground Digital ground Output of A(TIP) power amplifier Battery (power) ground Output of B(RING) power amplifier Decoder. TTL compatible. C3 is MSB and C1 is LSB. Chopper Clock. Input to switching regulator (TTL compatible). Freq = 256 kHz (Nominal). Chopper stabilization. Connection for external stabilization components. Ring-trip negative. Negative input to ring-trip comparator Ring-trip positive. Positive input to ring-trip comparator Detector. When enabled, logic Low indicates that the selected detector is tripped. Logic inputs C3-C1, E1, and E0 select the detector. Open-collector with a built-in 15 k pullup resistor. Read Enable. A logic Low disables DET. A logic High enables DET. Ground-Key Enable. When E0 is High, E1 = High connects the ground-key detector to DET, and E1 = Low connects the off-hook or ring-trip detector to DET. Ground-Key Filter Capacitor Connection. An external capacitor for filtering out highfrequency noise from the ground-key loop can be connected to this pin. An internal 36 k -20%, +40% resistor is provided to form an RC filter with the external capacitor. In versions which have a GKFIL pin, a 3.3 nF minimum capacitance must be connected from the GKFIL pin to ground. High-Pass Filter Capacitor. A(TIP) side of high-pass filter capacitor. High-Pass Filter Capacitor. B(RING) side of high-pass filter capacitor. Switching Regulator Power Transistor. Connection point for filter inductor and anode of catch diode. Has up to 60 V of pulse waveform on it and must be isolated from sensitive circuits. Keep the diode connections short because of the high currents and high di/dt Quiet Battery. Filtered battery supply for the signal processing circuits. Detector resistor. Threshold modification and filter point for the off-hook detector. DC feed resistor. Connection point for the DC feed current programming network. The other end of the network connects to the Receiver Summing Node (RSN). VRDC is negative for normal polarity and positive for reverse polarity. Ring Relay Driver. Sourcing from BGND with internal diode to QBAT. The metallic current (AC and DC) between A(TIP) and B(RING) is equal to 1000 x the current into this pin. The networks that program receive gain, two-wire impedance, and feed current all connect to this node. This node is extremely sensitive. Route the 256 kHz chopper clock and switch lines away from the RSN node. Thermal pin. Connection for heat dissipation. Internally connected to substrate (QBAT). Leave as open circuit or connected to QBAT. In both cases, the TP pins can connect to an area of copper on the board to enhance heat dissipation. Connected to office battery supply through an external protection diode. +5 V power supply -5 V power supply Regulated Voltage. Provides negative power supply for power amplifiers, connection point for inductor, filter capacitor, and chopper stabilization. Transmit Audio. This output is 0.510 times the A(TIP) and B(RING) metallic voltage. VTX also sources the two-wire input impedance programming network. Description
E0 E1 GKFIL
Input Input Capacitor
HPA HPB L
Capacitor Capacitor Output
QBAT RD RDC
Battery Resistor Resistor
RINGOUT RSN
Output Input
TP
Thermal
VBAT VCC VEE VREG VTX
Battery Power Power Input Output
4
AM79M535 Data Sheet
ABSOLUTE MAXIMUM RATINGS
Storage temperature . . . . . . . . . . . . -55C to +150C VCC with respect to AGND/DGND . . .-0.4 V to +7.0 V VEE with respect to AGND/DGND . . .+0.4 V to -7.0 V VBAT with respect to AGND/DGND. . . +0.4 V to -70 V Note: Rise time of VBAT (dv/dt) must be limited to 27 V/s or less when QBAT bypass = 0.33 F. BGND with respect to AGND/DGND . . . . . . . . . . . . . . . .+1.0 V to -3.0 V A(TIP) or B(RING) to BGND: Continuous . . . . . . . . . . . . . . . . . . -70 V to +1.0 V 10 ms (f = 0.1 Hz) . . . . . . . . . . . . -70 V to +5.0 V 1 s (f = 0.1 Hz) . . . . . . . . . . . . . . . -90 V to +10 V 250 ns (f = 0.1 Hz) . . . . . . . . . . . .-120 V to +15 V Current from A(TIP) or B(RING). . . . . . . . . . . .150 mA Voltage on RINGOUT . . . .BGND to 70 V above QBAT Current through relay driver . . . . . . . . . . . . . . . 60 mA Voltage on ring-trip input (DA and DB). . . . . . . . . . . . . . . . . . . . . VBAT to 0 V Current into ring-trip inputs . . . . . . . . . . . . . . . . .10 mA Peak current into regulator switch (L pin) . . . . . . . . . . . . . . . . . . . . . . 150 mA Switcher transient peak off voltage on L pin . . . . . . . . . . . . . . . . . . . . . +1.0 V C3-C1, E0, E1, CHCLK to AGND/DGND . . . . . . . . . . .-0.4 V to VCC + 0.4 V Maximum power dissipation, (see note) . . .TA = 70C In 32-pin PLCC package . . . . . . . . . . . . . . 1.74 W
Note: Thermal limiting circuitry on chip will shut down the circuit at a junction temperature of about 165C. The device should never be exposed to this temperature. Operation above 145C junction temperature may degrade device reliability. See the SLIC Packaging Considerations for more information. Stresses above those listed under Absolute Maximum Ratings may cause permanent device failure. Functionality at or above these limits is not implied. Exposure to Absolute Maximum Ratings for extended periods may affect device reliability.
OPERATING RANGES
Commercial (C) Devices Ambient temperature . . . . . . . . . . . . . . 0C to +70C* VCC . . . . . . . . . . . . . . . . . . . . . . . . . . 4.75 V to 5.25 V VEE . . . . . . . . . . . . . . . . . . . . . . . . -4.75 V to -5.25 V VBAT . . . . . . . . . . . . . . . . . . . . . . . . . . . -40 V to -58 V AGND/DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V BGND with respect to AGND/DGND . . . . . . . . . . . -100 mV to +100 mV Load resistance on VTX to ground . . . . . . . 10 k min
Operating Ranges define those limits between which the functionality of the device is guaranteed. * Functionality of the device from 0C to +70C is guaranteed by production testing. Performance from -40C to +85C is guaranteed by characterizations and periodic sampling of production units.
SLIC Products
5
ELECTRICAL CHARACTERISTICS
Description Analog (VTX ) output impedance Analog (VTX ) output offset 0C to 70C -1* -40C to +85C -1 Analog (RSN) input impedance Longitudinal impedance at A or B Overload level Z2WIN = 600 to 900 2-wire return loss (See Test Circuit D) 4-wire 2-wire 300 Hz to 500 Hz 500 Hz to 2500 Hz 2500 Hz to 3400 Hz 300 Hz to 3400 Hz -1* 200 Hz to 1 kHz normal polarity 0C to +70C normal polarity -40C to +85C reverse polarity 1 kHz to 3.4 kHz normal polarity 0C to +70C normal polarity -40C to +85C reverse polarity Longitudinal signal generation 4-L 300 Hz to 800 Hz 300 Hz to 800 Hz -2* -2 -2 -2* -2 -2 -1* -3.1 -6.0 26 26 20 48 52 63 58 54 58 54 54 40 42 25 18 5.75 5.65 5.75 5.70 -0.15 -0.20 -0.1 -0.15 5.85 5.85 5.85 5.85 6.00 6.05 5.95 6.00 +0.15 +0.20 +0.1 +0.15 mArms 4 4 -- 4 -- 4 -- 4 -- 4 -- -- -- 4 -- -- 4 -- -- 4 -- -- -- 4 -- 300 Hz to 3.4 kHz -35 -30 -40 -35 1 Test Conditions (See Note 1) Min Typ 3 +35 +30 +40 +35 20 35 +3.1 +6.0 Vpk 2 Max Unit mV Note 4 -- -- 4 4 4
Transmission Performance, 2-Wire Impedance dB 4, 13
Longitudinal Balance (2-Wire and 4-Wire, See Test Circuit C) RL = 600 , Longitudinal to metallic L-T, L-4 (normalized to unity gain) Longitudinal to metallic L-T, L-4
dB
Longitudinal current capability per wire Active state OHT state Insertion Loss (2- to 4-Wire and 4- to 2-Wire, See Test Circuits A and B) Gain accuracy 2- to 4-wire 2- to 4-wire 2- to 4-wire 2- to 4-wire Gain accuracy 4- to 2-wire 4- to 2-wire 4- to 2-wire 4- to 2-wire Variation with frequency 0 dBm, 1 kHz, 0C to +70C 0 dBm, 1 kHz, -40C to +85C 0 dBm, 1 kHz, 0C to +70C 0 dBm, 1 kHz, -40C to +85C 0 dBm, 1 kHz, 0C to +70C 0 dBm, 1 kHz, -40C to +85C 0 dBm, 1 kHz, 0C to +70C 0 dBm, 1 kHz, -40C to +85C 300 Hz to 3400 Hz Relative to 1 kHz 0C to +70C -40C to +85C +7 dBm to -55 dBm, ref 0 dBm 0C to +70C -40C to +85C
-1* -1
-1* -1
dB
-0.1 -0.15 -0.1 -0.15
+0.1 +0.15 +0.1 +0.15
Gain tracking
Notes: * P.G. = Performance Grade -2 grade performance parameters are equivalent to -1 performance parameters except where indicated.
6
AM79M535 Data Sheet
ELECTRICAL CHARACTERISTICS (continued)
Description Gain accuracy Test Conditions (See Note 1) 0 dBm, 1 kHz, 0C to +70C 0 dBm, 1 kHz, -40C to +85C 0 dBm, 1 kHz, 0C to +70C 0 dBm, 1 kHz, -40C to +85C 300 Hz to 3400 Hz Relative to 1 kHz 0C to +70C -40C to +85C +7 dBm to -55 dBm, ref 0 dBm 0C to +70C -40C to +85C f = 1 kHz Min -6.00 -6.05 -5.95 -6.00 Typ -5.85 -5.85 -5.85 -5.85 Max -5.75 -5.65 -5.75 -5.70 dB -0.10 -0.15 -0.10 -0.15 5.3 +0.10 +0.15 +0.10 +0.15 Unit Note 3 3, 4 3 3, 4 -- -- 3, 4 3, 4 -- -- 4 Balance Return Signal (4- to 4-Wire; See Test Circuit B)
-1* -1
Variation with frequency
Gain tracking
Group delay
s
-50 -40 -35
4, 15
Total Harmonic Distortion (2- to 4-Wire or 4- to 2-Wire, See Test Circuits A and B) Total harmonic distortion Total harmonic distortion with metering Idle Channel Noise C-message weighted noise 2-wire, 2-wire, 2-wire, 4-wire, 4-wire, 4-wire, Psophometric weighted noise 2-wire, 2-wire, 2-wire, 4-wire, 4-wire, 4-wire, Psophometric idle channel noise with metering 2-wire 4-wire 4 kHz to 9 kHz 9 kHz to 1 MHz 256 kHz and harmonics 1 kHz to 15 kHz Above 15 kHz 256 kHz and harmonics ILOOP (nominal) = 40 mA RL = 600 RL = 600 RL = 0 A and B shorted to GND -7.5 18 20 0C to +70C 0C to +70C -40C to +85C 0C to +70C 0C to +70C -40C to +85C 0C to +70C 0C to +70C -40C to +85C 0C to +70C 0C to +70C -40C to +85C -1* +7 +7 +7 +7 +7 +7 -83 -83 -83 -83 -83 -83 +15 +12 +15 +15 +12 +15 -75 -78 -75 -75 -78 -75 -46 -52 -76 -76 -57 -70 -85 -57 +7.5 22 1.0 1.0 130 mA mA dBmp -- -- 4 -- -- 4 7 -- 4, 7 7 -- 4, 7 4, 11 0 dBm, 300 Hz to 3.4 kHz +9 dBm, 300 Hz to 3.4 kHz -64 -55
dB
4, 10
dBrnC
-1*
-1*
-1*
Signal Frequency Out-of-Band Noise (See Test Circuit E) Metallic 4, 5, 9 4, 5, 9 4, 5 4, 5, 9 4, 5, 9 4, 5
Longitudinal
dBm
DC Feed Currents (See Figure 1a, 1b, 1c) Battery = -48 V Active state loop-current accuracy OHT state Tip Open state Open Circuit state Fault current limit, ILLIM (IAX + IBX) %
SLIC Products
7
ELECTRICAL CHARACTERISTICS (continued)
Description On-hook Open Circuit state -1* On-hook OHT state -1* On-hook Active state -1* Off-hook OHT state Off-hook Active state Supply Currents VCC on-hook supply current Open Circuit state OHT state Active state Open Circuit state OHT state Active state Open Circuit state OHT state Active state 3.0 6.0 7.5 1.0 2.2 2.7 0.4 3.0 4.0 4.5 10.0 12.0 2.3 3.5 6.0 1.0 5.0 6.0 mA RL = 600 RL = 600 Test Conditions (See Note 1) Min Typ 35 35 135 135 200 200 500 650 Max 120 80 250 200 400 300 750 1000 mW Unit Note Power Dissipation Battery = -48 V, Normal Polarity
VEE on-hook supply current
VBAT on-hook supply current
Power Supply Rejection Ratio (VRIPPLE = 50 mVrms) VCC 50 Hz to 3400 Hz -1* 3.4 kHz to 50 kHz -1* VEE 50 Hz to 3400 Hz -1* 3.4 kHz to 50 kHz -1* VBAT 50 Hz to 3400 Hz -1 3.4 kHz to 50 kHz -1* Off-Hook Detector Current threshold accuracy IDET = 365/RD Nominal B(RING) to GND B(RING) to GND Midpoint to GND Ring-Trip Detector Input Bias current Offset voltage Input High voltage Input Low voltage Input High current Input High current Input Low current All inputs except E1 Input E1 -75 -75 -0.40 Source resistance 0 to 2 M -5 -50 2.0 0.80 40 45 -0.05 0 +50 -20 +20 % 25 30 22 25 20 25 10 10 27 30 20 25 45 45 35 35 40 40 25 25 45 45 40 40
dB
6, 7
Ground-Key Detector Thresholds, Active state, Battery = -48 V (See Test Circuit F) Ground-key resistance threshold Ground-key current threshold 2.0 5.0 9 9 mA 8 10.0 k
A
mV 12
Logic Inputs (C4-C1, E0, E1, and CHCLK) V
A
mA
8
AM79M535 Data Sheet
ELECTRICAL CHARACTERISTICS (continued)
Description Logic Output (DET) Output Low voltage Output High voltage Relay Driver Outputs (RINGOUT) On voltage Off leakage Clamp voltage 50 mA sink QBAT -2 50 mA source BGND -2 BGND -0.95 0.5 100 V A V IOUT = 0.8 mA IOUT = -0.1 mA 2.4 0.40 V Test Conditions (See Note 1) Min Typ Max Unit Note
RELAY DRIVER SCHEMATIC
BGND
RINGOUT
QBAT
16856B-002
SWITCHING CHARACTERISTICS
Symbol Parameter E1 Low to DET High (E0 = 1) tgkde E1 Low to DET Low (E0 = 1) tgkdd tgkd0 E0 High to DET Low (E1 = 0) E0 Low to DET High (E1 = 0) Ground-Key Detect state 0C to +70C RL open, RG connected -40C to +85C (See Figure H) 0C to +70C -40C to +85C 0C to +70C -40C to +85C 0C to +70C -40C to +85C 0C to +70C -40C to +85C 0C to +70C -40C to +85C 0C to +70C -40C to +85C 1.1 1.6 1.1 1.6 3.8 4.0 1.2 1.7 3.8 4.0 1.1 1.6 3.8 4.0 Test Conditions Temperatures Ranges 0C to +70C -40C to +85C Min Typ Max 3.8 4.0 Unit Note
s
4
E1 High to DET Low (E0 = 1) tshde E1 High to DET High (E0 = 1) Switchhook Detect state RL = 600 , RG open E0 High to DET Low (E1 = 1) (See Figure G) E0 Low to DET High (E1 = 1)
tshdd tshd0
SLIC Products
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SWITCHING WAVEFORMS
E1 to DET
E1
DET tgkde tshde tgkde tshde
E0 to DET
E1
E0 DET
tshdd
tshd0
tgkdd
tgkd0
16856B-003
Note: All delays measured at 1.4 V level.
10
AM79M535 Data Sheet
Notes: 1. Unless otherwise noted, test conditions are BAT = -48 V, VCC = +5 V, VEE = -5 V, RL = 600 , CHP = 0.22 F, RDC1 = RDC2 = 31.25 k, CDC = 0.1 F, Rd = 51.1 k, no fuse resistors, two-wire AC output impedance, programming impedance (ZT)= 306 k resistive, receive input summing impedance (ZRX) = 300 k resistive. (See Table 2 for component formulas.) 2. Overload level is defined when THD = 1%. 3. Balance return signal is the signal generated at VTX by VRX. This specification assumes that the two-wire AC load impedance matches the impedance programmed by ZT. 4. Not tested in production. This parameter is guaranteed by characterization or correlation to other tests. 5. These tests are performed with a longitudinal impedance of 90 and metallic impedance of 300 for frequencies below 12 kHz and 135 for frequencies greater than 12 kHz. These tests are extremely sensitive to circuit board layout. 6. This parameter is tested at 1 kHz in production. Performance at other frequencies is guaranteed by characterization. 7. When the SLIC is in the Anti-sat 2 operating region, this parameter is degraded. The exact degradation depends on system design. The Anti-sat 2 region occurs at high loop resistances when VBAT - VAX - VBX is less than approximately 17 V. 8. "Midpoint" is defined as the connection point between two 300 series resistors connected between A(TIP) and B(RING). 9. Fundamental and harmonics from 256 kHz switch-regulator chopper are not included. 10. Total harmonic distortion with metering as specified with a metering signal of 2.2 Vrms at the two-wire output, and a transmit signal of +3 dBm or receive signal of -4 dBm. The transmit or receive signals are single-frequency inputs, and the distortion is measured as the highest in-band harmonic at the two-wire or the four-wire output relative to the input signal. 11. Noise with metering is measured by applying a 2.2 Vrms metering signal (measured at the two-wire output) and measuring the psophometric noise at the two-wire and four-wire outputs over a 200 ms time interval. 12. Tested with 0 source impedance. 2 M is specified for system design purposes only. 13. Assumes the following ZT network: VTX 153 k 56 pF 14. Group delay can be considerably reduced by using a ZT network such as that shown in Note 13 above. The network reduces the group delay to less than 2 s. The effect of group delay on linecard performance may be compensated for by using the QSLACTM or DSLACTM devices. 153 k RSN
Table 1. SLIC Decoding
DET Output State 0 1 2 3 4 5 6 7 C3 C2 C1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 Two-Wire Status Open Circuit Ringing Active On-hook TX (OHT) Tip Open Reserved Active Polarity Reversal OHT Polarity Reversal E0 = 1* E1 = 0 Ring trip Ring trip Loop detector Loop detector Loop detector Loop detector Loop detector Loop detector E0 = 1* E1 = 1 Ring trip Ring trip Ground key Ground key -- -- Ground key Ground key
Note: * A logic Low on E0 disables the DET output into the open-collector state.
SLIC Products
11
Table 2. Z T = 510 ( Z 2WIN - 2R F )
User-Programmable Components
ZT is connected between the VTX and RSN pins. The fuse resistors are RF, and Z2WIN is the desired 2-wire AC input impedance. When computing ZT, the internal current amplifier pole and any external stray capacitance between VTX and RSN must be taken into account. ZRX is connected from VRX to the RSN pin, ZT is defined above, and G42L is the desired receive gain. RDC1, RDC2, and CDC form the network connected to the RDC pin. RDC1 and RDC2 are approximately equal.
ZL 1000 * Z T Z RX = ---------- * ------------------------------------------------G 42L Z T + 510 ( Z L + 2R F ) 2500 R DCI + R DC2 = -----------I FEED R DC1 + R DC2 C DC = 1.5 ms * ------------------------------R DC1 * R DC2 365 R D = -------- , IT 0.5 ms C D = ---------------RD
RD and CD form the network connected from RD to -5 V and IT is the threshold current between on hook and off hook. ZM is connected from VMG (metering source) to the RSN pin, VM2W is the desired magnitude of the metering signal at the 2-wire output (usually 2.2 Vrms) and K1 ( ) is defined below.
V MG K1 ( ) * ZL * ZT Z M = -------------- * -----------------------------------------------------------------------V M2W Z T + 0.51 * K 1 ( ) ( 2R F + Z L )
1000 K 1 ( ) = -------------------------------------------------------------------------------------------------------------9 1 + j ( 11.5 * 10 + CX 2 ) ( 36 + Z L + 2R F )
where: CX = The values of the identical capacitors from A and B to GND
= 2 * metering frequency
12
AM79M535 Data Sheet
DC FEED CHARACTERISTICS
3 4 2 5
VBAT = 60 V VBAT = 47.3 V VBAT = 43 V
4 2
5
1
1
RDC = 62.5 k
Active state OHT state
Notes: 1. Constant-current region: Active state,
2500 I L = ----------R DC 1 2500 I L = -- ----------2 R DC
VAB = 1.02 |VBAT| - 14, VAB = 29.95 V, |VBAT| < 43.1 V (Anti-sat -2) |VBAT| 43.1 V (Anti-sat -1)
OHT state, 2. Anti-sat turn-on;
3. Open Circuit voltage; VAB = 0.55 |VBAT| + 11.4, VAB = 40 V, 4. Anti-sat -1 region 5. Anti-sat -2 region |VBAT| 53 V (Anti-sat -2) |VBAT| > 53 V (Anti-sat -1)
a. VA-VB (VAB) Voltage vs. Loop Current (Typical)
SLIC Products
13
0
1000
2000 Load Resistance ()
3000
4000
RDC = 62.5 k VBAT = 47.3 V b. Loop Current vs. Load Resistance (Typical)
A
a
RL
IL SLIC b
RSN RDC1
RDC2 B RDC
CDC
Current programmed by RDC1 and RDC c. Feed Programming
16856B-004
Figure 1.
DC Feed Characteristics
14
AM79M535 Data Sheet
TEST CIRCUITS
A(TIP) RL 2 VL RL 2 B(RING) RSN RRX B(RING) RSN RRX VRX IL2-4 = -20 log (VTX / VAB) IL4-2 = -20 log (VAB / VRX) BRS = 20 log (VTX / VRX) B. Four- to Two-Wire Insertion Loss and Balance Return Signal VAB SLIC AGND RT VAB RL SLIC AGND RT RTMG VMG VTX A(TIP) VTX
A. Two- to Four-Wire Insertion Loss
RL 2 1/C << RL A(TIP) VTX RT S1 Closed, S2 Open L-T Long. Bal. = -20 log (VAB / VL) L-4 Long. Bal. = -20 log (VTX / GTX * VL) S2 Closed, S1 Open 4-L Long. Sig. Gen. = -20 log (VL / VRX) S2 B(RING) RL 2 C. Longitudinal Balance ZD A(TIP) VTX Note: ZD is the desired impedance (e.g., the characteristic impedance of the line.) RSN VRX RRX
SLIC C S1 VL VL AGND
R VS R VM RT SLIC
RL = 20 log (2 VM / VS)
B(RING) RSN ZIN RRX
D. Two-Wire Return Loss Test Circuit
SLIC Products
15
TESTS CIRCUITS (continued)
RL 68 C A(TIP) 1/C << 90 SM IDC SLIC RL B(RING) A(TIP)
56
68
C B(RING) SE
RG
Current Feed and Ground Key E. Single-Frequency Noise F. Ground-Key Detection
VCC
6.2 k A(TIP) A(TIP) RL = 600 E0 B(RING) E1 DET 15 pF
B(RING) RG = 2 k
G. Ground-Key Switching
H. Loop-Detector Switching
16
AM79M535 Data Sheet
PHYSICAL DIMENSION
PL032
.447 .453 .485 .495 .009 .015 .125 .140 .080 .095 SEATING PLANE .400 REF. .013 .021 .026 .032 TOP VIEW .050 REF. .490 .530 .042 .056
.585 .595 .547 .553
Pin 1 I.D.
SIDE VIEW
16-038FPO-5 PL 032 DA79 6-28-94 ae
REVISION SUMMARY Revision B to C
* Minor changes were made to the data sheet style and format to conform to AMD standards.
Revision C to D
* In the Pin Description table, inserted/changed TP pin description to: "Thermal pin. Connection for heat dissipation. Internally connected to substrate (QBAT). Leave as open circuit or connected to QBAT. In both cases, the TP pins can connect to an area of copper on the board to enhance heat dissipation." Minor changes were made to the data sheet style and format to conform to AMD standards.
*
Revision D to E
* * * The physical dimension (PL032) was added to the Physical Dimension section. Deleted the Ceramic DIP and Plastic DIP part (Am79M531) and references to it. Updated the Pin Description table to correct inconsistencies.
SLIC Products
17
The contents of this document are provided in connection with Advanced Micro Devices, Inc. ("AMD") products. AMD makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication and reserves the right to make changes to specifications and product descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual property rights is granted by this publication. Except as set forth in AMD's Standard Terms and Conditions of Sale, AMD assumes no liability whatsoever, and disclaims any express or implied warranty, relating to its products including, but not limited to, the implied warranty of merchantability, fitness for a particular purpose, or infringement of any intellectual property right. AMD's products are not designed, intended, authorized or warranted for use as components in systems intended for surgical implant into the body, or in other applications intended to support or sustain life, or in any other application in which the failure of AMD's product could create a situation where personal injury, death, or severe property or environmental damage may occur. AMD reserves the right to discontinue or make changes to its products at any time without notice.
(c) 1999 Advanced Micro Devices, Inc. All rights reserved.
Trademarks AMD, the AMD logo, and combinations thereof, and DSLAC and QSLAC are trademarks of Advanced Micro Devices, Inc. Other product names used in this publication are for identification purposes only and may be trademarks of their respective companies.


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